Zynq Based Magnetometer
This client desired a magnetometer based on the Xilinx Zynq SOC. The Zynq contains dual ARM-9 processors, Gigabit Ethernet, USB, and a host of other features along with a generous helping of programmable logic. This design was based on custom carrier cards for the MicroZED (pictured) running Linux and communicating to the host using Ethernet and USB. The FPGA functions include: modulation of the sensor via Direct Digital Synthesis (DDS), acquisition, IIR filtering, and demodulation using lock-in amplifiers, and control of multiple precision sensor heaters and other custom interfaces. Interfaces include the AD7176 ADC, AD7193 ADC, LTC2378 ADC, and AD5541A DAC. A specialized communications scheme was developed to allow synchronization and host access in a multi-board system.
The SAM Atomic Physics Precision Measurement Board
The SAM design is a mixed signal embedded product which utilizes a Virtex-5 XC5VFX70T with 400 MHz PowerPC processorTM and IEEE-754 double precision floating point unit constructed in the FPGA fabric and coupled to CPU via the auxiliary processor interface. Two custom DDS generators are used to modulate two lasers with 18 bits of precision. Two photodiode amplifiers and 14-bit ADCs acquire the data for real-time processing in the FPGA. The FPGA digital signal processing is performed in both fixed and single precision floating point hardware to support the wide dynamic range required. In order to acheive the desired performance, instantiated DSP48E slices were used to perform the front-end processing in the FPGA. In addition, the design contains multiple heater and temperature sensing interfaces: one uses a PWM driving a Class-D amplifier to drive a heater cable and a lock-in amplifier to extract the temperature from an RTD using AC excitation (no DC component). The second is a Thermal Electric Cooler and thermistor interface to control the temperature of the lasers to within 1 mK. Verien worked closely with the client to define the product, and then designed the analog circuitry, FPGA, board, and provided the diagnostics running on the embedded PowerPC.
Time to Digital Converter (TDC)
This client desired a Time to Digital Converter (TDC) to accurately measure frequency for a precision magnetometer. Verien was able to implement a dual tapped delay line running in a low-cost Artix-7 FPGA from a 333 MHz clock and achieved about 30 psecs RMS of error. The implementation is complete providing on-chip callibration, calibration signal generation and host access to the calibration and timing results.
The ECT DAS-2
The ECT DAS-2 is an Electrical Capacitance Tomography Data Acquisition System, the second generation for this client. ECT is a type of tomography used for industrial process monitoring to image fluid or solid flow in pipes. A section of pipe is surrounded with an array of plates, referred to as a capacitance cell. The capacitances between all plate pairs are measured, modulating one plate and acquiring from the others in sequence. This version of the system has a modular architecture that consists of 3, 4, or 5 boards which can accommodate 12, 24, or 36 plates, providing up to 630 distinct plate pair combinations. It is capable of measuring with a resolution of 1 femtofarad. The DAS dynamically balances out the standing capacitances of the cell, typically 1 picofard, and the effects of cable capacitance, typically 500 picofarads. It operates at a rate of 200 frames per second for 24 channels allowing for real time tomographic reconstruction. This mixed signal design uses a Xilinx 7-Series FPGA, an XC7A200T Artix-7 device, which interfaces to DAC's for excitation, controls the data acquisition and signal extraction through lock-in techniques, and performs automatic calibration. Signal extraction and calibration were designed in Matlab / Simulink, synchronous demodulation and an arctangent via CORDIC unit. Communication is via USB to the host.
The ECT DAS
The ECT DAS is an Electrical Capacitance Tomography Data Acquisition System. Please see above for a description of ECT. This original version can drive up to 24 plates, providing 276 distinct plate pair combinations, measuring with a resolution of 1 femtofarad. The DAS dynamically balances out the standing capacitances of the cell, typically 1 picofard, and the effects of cable capacitance, typically 500 picofarads. It operates at a rate of 50 frames per second, providing real time digitization. This mixed signal design uses a Virtex-5 FPGA which interfaces to DAC's, ADC's, performs modulation / demodulation. Automatic calibration is available on command. USB and RS-232 communication ports are provided for connection to the host computer.